Optimizations and Case Studies—Decapsulation of Hardened Epoxy SiC MOSFETs and Diodes via JIACO Microwave Induced Plasma Etching

Microchip Technologies, ISTFA 2024, High Tg Mold Compound, Passivation & Die Crack, SiC, Reliability Test.
Passivation crack SiC High Tg Mold compound after MIP decap

Abstract

One of the foremost challenges in the field of SiC MOSFET failure analysis is the effect of thermally modified mold compound on the decapsulation process. The extended total etch time that thermal modification imposes on the process of wet chemical decapsulation has created a niche for new techniques to fill. This paper focuses on use cases for the JIACO
microwave-induced plasma (MIP) etching system and how to best optimize the tool’s settings to facilitate time-efficient decapsulations. The words and data that follow aim to present what has been determined to be a successful alternative for the decapsulation of thermally modified Si and SiC power devices when wet etches prove to be ineffective.

Connor J. Sorrels (Microchip Technology Inc. USA), Kyle E. Nielsen (Microchip Technology Inc. USA), Bret A. Walters (Microchip Technology Inc. USA), Jiaqi Tang (JIACO Instruments. Delft, The Netherlands), Mark W. McKinnon (JIACO Instruments. Delft, The Netherlands)

Delamination
EOS on device
Passivation crack SiC High Tg Mold compound after MIP decap

Download this paper

Why plasma over acid decapsulation?

Discover the new industry standard for semiconductor failure analysis

Download our whitepaper